Recently, a multilayer wiring board on which semiconductor chips such as an LSI and so on can be mounted at a high density has been used not only in the filed of industrial apparatus, but also in the field of household electric appliances, as a result of miniaturization and improvement in performance of electronics devices. For this reason, a cheaper multilayer wiring board is required. Further, the market always requires a multilayer board wherein a plurality of wiring pattern layers with a finer wiring pitch are electrically connected with a higher interconnection reliability.
In order to meet the requirement, a multilayer board wherein an inner via hole connection method is employed for interlay connection instead of a through-hole plating which was mainly employed, has been developed and practically used. According to the inner via hole connection method, interlayer connection between any electrodes of the multilayer print-wiring board can be obtained at any position of a wiring pattern. This multilayer board is called an All Layers Interstitial Via Hole (IVH) structure resin multilayer wiring board (see Japanese Patent Kokai (Laid-Open) Publication No. 6-268345). By employing this multilayer wiring board, it is possible to make a connection only between the desired wiring layers by filling the via hole with a conductive substance. Further, in this multilayer wiring board, it is possible to realize miniaturization of the board size and high density mounting since the inner via hole can be formed just under a component land.
In order to realize an interlayer connection with a higher density, there has been proposed a wiring board wherein two wiring layers formed on both surfaces of an electrically insulating substrate are electrically connected with a conductive paste which is filled in inner via holes, and at least one wiring layer is embedded in an adhesive layer. In addition, a method for producing the wiring board has been proposed, in which the wiring layer is embedded in the adhesive layer by transferring the wiring layer formed on a support base (see Japanese Patent Kokai (Laid-Open) Publication No.2000-77800). By employing this constitution, a high reliability is obtained even if the size of the inner via hole is small. Further, there has been proposed a transfer medium with a fine wiring pattern which is suitable for producing a high-density multilayer wiring board (see Japanese Patent Publication No. 3172711). A wiring transfer sheet which is suitable for forming a wiring layer is also disclosed in Japanese Patent Kokai (Laid-Open) Publication No.2000-154354.
The technique of forming the wiring layer with the wiring transfer sheet has been employed in the production of the wiring board as a useful method for forming the wiring. In the following, an example of the method for forming a wiring layer with a wiring transfer sheet is described referring to FIG. 16.
FIGS. 16(a) to (c) shows cross-sectional views illustrating the main steps in a method of forming a wiring layer. FIG. 16(a) shows a state in which wiring transfer sheets 1203 are superposed on both surfaces of an electrically insulating substrate 1204. FIG. 16(b) shows a step of transferring wiring layers 1202 of the wiring transfer sheets 1203 to the electrically insulating substrate 1204. FIG. 16(c) shows a step of removing support bases 1201 so as to obtain a wiring board.
In FIG. 16(a), the wiring transfer sheet 1203 is constituted by the support base 1201 and the wiring layer 1202 which is formed on the support base in a predetermined pattern. The wiring transfer sheet 1203 is produced by laminating a copper foil on an aluminum foil to obtain a composite foil followed by etching the copper foil selectively in a desired pattern, as described in Japanese Patent Publication No. 3172711. An enlarged view of Area A in the vicinity of the wiring layer of this wiring transfer sheet 1203 is shown in FIG. 16(d). As shown in FIG. 16(d), in the wiring transfer sheet, an exposed area of a surface of the support base 1201 (i.e. a surface which contacts the electrically insulating substrate) is flat. This is because the aluminum foil has a flat surface.
In FIG. 16(a), the electrically insulating substrate 1204 (to which the wiring layer is to be transferred) has through holes 1205 which are filled with a conductive paste 1206. A porous substrate which can be compressed, or a three-layer substrate wherein a core film is sandwiched with adhesive layers is used as the electrically insulating substrate 1204. The through holes 1205 are formed by laser processing using a carbon dioxide laser, an excimer laser or a YAG laser. The laser processing is generally employed for forming through holes since it is excellent in productivity.
Next, as shown in FIG. 16(b), the wiring transfer sheet 1203 is adhered to the electrically insulating substrate 1204 by heating and pressurizing, and then the wiring layer 1202 is transferred to and embedded in the electrically insulating substrate 1204. The electrically insulating substrate 1204 contains a thermosetting resin which is cured upon heating and pressurization so as to adhere to the wiring layer. Further, the conductive paste 1206 filled in the through holes 1205 is compressed by embedding the wiring layer 1202. Compression of the conductive paste 1206 makes the density of the conductive particles in the conductive paste high. Thus, the electrical connection between the wiring layers 1202 is ensured.
Next, the support base 1201 is dissolved and removed by etching whereby a wiring board which has wiring layers on both surfaces is obtained as shown in FIG. 16(c). Etching is conducted using as an etchant chemicals which selectively dissolve only the support base 1201 and do not dissolve the wiring 1202. FIGS. 16(e) and (f) show enlarged views of Areas B and C shown in FIG. 16(c), respectively. As shown in FIG. 16(e), an exposed area of a surface of the electrically insulating substrate 1204 becomes flat as a result of transferring the surface shape of the support base 1201. As shown in FIG. 16(f), the surface of the wiring layer 1202 also becomes flat. This is because the face which corresponds to the surface of the wiring layer 1202 reflects the surface shape of the support base 1201 which the wiring layer 1202 has contacted before transferring. A semiconductor bare chip is advantageously mounted on the wiring board having such a flat surface, and thereby an excellent initial mounting characteristic is ensured.
As the flatness of the surface of the wiring board increases, the initial mounting characteristic becomes better, while the adhesiveness of the wiring board to a substance (e.g. a resin) which is laminated on its surface disadvantageously becomes lower. The substances to be laminated on the surface of the wiring board are, for example, a sealing resin which is used upon mounting a semiconductor bare chip, and a solder resist for protecting a solder which is used upon mounting an electrical component. In a case where the adhesion between these materials and the surface of the wiring board is bad, interfacial exfoliation tends to occur due to stress caused by heating or bending. Similarly, when a multilayer wiring board is obtained by laminating another electrically insulating substrate on the double-faced wiring board produced according to the steps shown in FIG. 16, the high flatness of the wiring board lowers the adhesiveness of the electrically insulating substrate to the wiring board, which tends to cause interfacial exfoliation between the electrically insulating substrates and interfacial exfoliation between the insulating substrate and the wiring layer (the copper foil) of the wiring board. In any case, the occurrence of the interfacial exfoliation causes mounting failure or contact failure, so that the property of a product in which the wiring board is incorporated is adversely affected.
As described above, the wiring board obtained by using the conventional wiring transfer sheet has excellent surface flatness, although there is a problem in that it is difficult to ensure the adhesiveness of the wiring board to the resin laminated thereon due to the high surface flatness. The present invention has been made in consideration of these circumstances, and an object thereof is to provide a wiring transfer sheet that enables production of a wiring board which has a surface flatness macroscopically suitable for mounting a semiconductor bare chip or a electronic component thereon, but which also has a surface structure to which a resin to be laminated thereon microscopically adheres well. Further, an object of the present invention is to provide a wiring board which is produced by using the wiring transfer sheet, wherein at least an exposed area of a surface of an electrically insulating substrate has a surface flatness macroscopically suitable for mounting a semiconductor bare chip thereon, while it also has a surface structure to which a resin to be laminated thereon microscopically adheres well.